Semiconductor Technologies for Novel Elevator Sensors
Mar 1, 2011
3D light curtains have their limitations, but novel semiconductor technologies may make up for those shortcomings.
by Beat De Coi and Felix Lustenberger
ESPROS Photonics Ltd., Switzerland
This paper was presented at ELEVCON Lucerne 2010, the International Congress on Vertical Transportation Technologies and first published in IAEE book Elevator Technology 18, edited by A. Lustig. It is a reprint with permission from the International Association of Elevator Engineers IAEE (website: www.elevcon.com). This paper is an exact reprint and has not been edited by ELEVATOR WORLD.
Key Words: Sensors, safety, performance, hoist way information
ABSTRACT
Starting in the late 80s, optical multi-beam safety sensors for door protection gained the majority of the market. Thus, everybody in the industry is familiar with light curtains. However, comparing the safety and the comfort of today’s safety devices with those for production machines, elevator safety is way behind them. The crucial point for elevator door safety sensors was the lack of three-dimensional area recognition. A first step was made with the introduction of 3D light curtains. Because of unsatisfying performance of these devices, limited success is visible. Novel semiconductor technologies allow closing this gap.
1. INTRODUCTION
Over the past 5 years, CMOS image sensors (CIS) have become ubiquitous: more than one billion of cell phone cameras and digital still picture cameras are produced every year with still a dramatic growth rate in the two-digit range. At least for applications in the visible range, these camera products make steady technical progress. Typically, the semiconductor processes utilized to implement these kinds of products are based on enhanced standard CMOS processes either used in memory technology or mixed-signal ASICs. However, fundamentally the same limitations are observed in all of these CMOS sensing elements: while a non-negligible dark current limits the achievable dynamic range (DR) and signal-to-noise ratio (SNR), relatively low quantum efficiencies (QE) and optical fill factors (FF) are impairing additionally the ability to detect single photons in highly-integrated imager systems. Although these limitations are a nuisance in consumer camera products, they present fundamental limitations in high-performance industrial sensors and scientific instrumentation. This is mainly due to the fact that those application areas heavily depend on the ability to detect signals in the near-infrared (NIR) range.
It has been concluded from many previous attempts to fundamentally change the behavior of CIS technologies based on traditional approaches in CMOS manufacturing that there is a need to drastically change the way of producing CMOS imagers. Instead of taking a basic CMOS process and trying to add technology modules that enable decent photo-sensing in the visible and NIR range, we think that it is much more advisable to tackle the problem the other way around: do whatever is necessary to achieve ultimate photon-detection performance and then add the means of a CMOS process technology to implement the necessary signal conditioning, signal processing and interface to form a complete high-performance opto-sensor product. Although many of the basic concepts to achieve this goal have been around since quite some time, they only became feasible in terms of commercial value and fabrication by the avenue of modern deep-submicron CMOS process technology. Espros Photonics Corp. (EPC) has been founded in early 2007 to implement and realize some of these novel concepts in order to provide a radically new technology platform in CMOS-integrated photonics. Continued
This article is organized as follows: a brief introduction to market areas and business potentials for highly integrated optical systems-on-a-chip (OSOCs) and optical systems-in-a-package (OSIPs) will motivate and precede the presentation of the fundamental technology requirements and basic approaches to reach single-photon sensitivity in complex opto-sensing of section 3. Then, we will outline avenues of approaches to increase the value of OSOCs by combining traditional packaging methods with additional photonics functionality. In section 5, we then give practical examples of product classes and their roadmap from discrete component assemblies into highly integrated OSIPs in the near future. Finally, we summarize and conclude this work in section 6.
2. MARKET AREAS FOR HIGHLY-INTEGRATED PHOTONICS
Optical sensors are swarming around us in our daily life without being remarked all the time. This is mainly due fact that those sensors operate invisible to the human eye in the near infrared range. These sensor products make our life safe and comfortable in elevators and public buildings, in smoke and fire detectors, at sliding doors and moving gates, around dangerous machinery and robots as well as in public transportation and health care. They all have in common that they do not need to be seen to operate properly. If you then open up such product and give it a closer look, you remark instantly that most of these products are built from a plethora of discrete components. While this may make complete sense for some of the low-volume specialty products, it is definitely a problem for high-volume products such as light-barriers or light curtains. Besides from the obvious advantages in terms of component pricing and geometrical size, they would greatly benefit from higher integrated optical sensor products in the domain of product reliability and assembly complexity and hence assembly cost. Although the massive aggregation of discrete components inherently provides high flexibility in the product design, each component represents a non-negligible assembly cost in the surface mounting devices assembly line (SMD) as well as it comes with a non-zero failure rate per pin that is soldered to the printed circuit board (PCB). Higher integration levels tackle both elements at the same time.
However, it is clear that chip-integration of optical sensors comes at a cost: flexibility is partially lost if one does not pay attention to it. It becomes immediately evident that you need to compensate for this loss of flexibility by adding configurability and programmability to these optical sensor chips. First of all, this is necessary to compensate for manufacturing variations in the actual sensing element. But further more, programmability is also crucial for flexible signal processing in order to create application specific systems-on-chip (SOC) or even standard sensor products. It has been observed in the past that many electronic circuits became very successful because they had a custom programmable signal conditioning and processing part integrated into it which enable the usage of this circuit way beyond what it was first intended for. But to be successful, one shall not stop at the output of (pre-) processed information and you need to think about the interfacing to the external world. In quite many application one needs to aggregate information from several different sensors in different locations and some times even from different kind of signal. It becomes extremely important to provide the necessary means of interfacing that provide ease-of-use at the same as high security of data transmission in a harsh industrial environment.
A further important aspect of such highly integrated optoelectronic chips is packaging. It normally represents a sizeable part of the overall product cost. In standard electronic components it has the only benefit of protecting the circuit from environmental influence and make it available to standard assembly methods in electronic production lines. In the case of optoelectronic sensors, this may look completely different: by adding optical functionality such as filtering-off non-wanted components of the light spectrum and adding simple or more complex beam-shaping capabilities right into the package, one can add good value into the package to lower the overall system cost. However, it is important that components packaged and packed with such elements keep being machine-solderable. Otherwise a key benefit would be lost and would need to be compensated by higher manual assembly cost.
Hence, the combination of a good optical front-end with flexible signal conditioning and reasonable interfacing to a variety of different sensors, packaged into a machine-solderable package makes up a good optical sensor product. Traditional semiconductor industry that mainly focuses on high-volume mainstream products is not interested in investing into semiconductor process technology that enables such opto-sensoric products.
In the overall annual semiconductor market which by 2008 exceeds 300B$, the estimated 1-2B$ market for opto-sensoric chip products is simply too small to be considered by a large integrated device manufacturer (IDM). This is further accentuated by the fact that these large IDMs need to amortize their multi-billion dollar investment they did into their deep-submicron fabrication facilities for process nodes beyond 90nm. However, with the right setup of a technology platform it will represent attractive niche markets even when considering the diversity of products and applications to be handled. But it clearly needs a lot of flexibility and dedication towards smaller customers to be successful in this market area. Not only the fabrication process but also all of the business processes need to be adapted to that non-traditional environment.
3. TECHNOLOGY REQUIREMENTS AND BASIC APPROACHES
Modern semiconductor manufacturing processes for CMOS technology rely on several key approaches to increase production yield. Unfortunately, those approaches inherently impede the ability to integrate good photo sensors in the near infrared range (NIR) together with CMOS electronics on the same chip. The most flagrant impediment is the use of high background doping levels in the base silicon wafer material together with high oxygen concentration. In order to achieve state-of-the-art photosensitivity and noise values, one needs to overcome these technological limitations. Furthermore, highly-integrated sensor products rely on a number of additional features required on top of a standard CMOS technology to complete the integration effort: High voltage transistors enable industrial-grade interfacing to the real world of applications whereas non-volatile memory is required to safely store configuration and calibration data on the chip.
3.1 High Quantum Efficiency in NIR Range
The absorption length in silicon around 850nm to 950nm exceeds 15mm. On the other hand, the junction depth in CMOS process technologies scales with the process node achieving only 1mm at the maximum with modern deep-submicron processes and hence unacceptably low quantum efficiencies in the NIR range. Using a thick epitaxial layer or using through-substrate configurations might overcome this limitation; see Figure 1 for
a comparison of the two cases. However, the second limitation in the thickness of the depletion zone in the junction comes from the background doping of the wafer base material. With normal Czochralski (CZ) wafer material, the lowest doping levels available are in the order of 50Ohm*cm. This basically limits the junction depth to about 10mm maximum and hence the intrinsic quantum efficiency in the 950nm wavelength regime to less than 50%, typically 10%. In turn, this is clearly too far away of the quantum efficiency of greater than 90% that is seen
in today’s commercial discrete PIN photo diodes. Hence, high-resistivity wafers are required to achieve decent
absorption volumes for NIR radiation.
3.2 Low-Noise Detection and Ultra-Low Dark Currents
Another limit of the classical CMOS substrates is the dark current in such thick junctions necessary for NIR
detection. Dark current and its attributed shot noise are directly contributing to the total noise power in the signal chain of the detector and cannot be eliminated by classical noise-reduction techniques such correlated double sampling (CDS) and bandwidth limitation required to reach the single-photon detection limit. The relatively high oxygen content in traditional CZ base material acts as gettering sites for heavy metal ions, which inevitably appear even in the most advanced single-wafer processing machinery. Working as cleanly as possible to avoid contamination by heavy metal ions in the production facility is certainly a good starting point but is definitely not enough to keep a good dark current behavior as well as a high yield in the production line. Standard CMOS wafers show carrier life times in the order of several 10ms maximum, which together with a 10mm thick junction lead to dark currents of several 10nA/cm2. On the other hand, discrete photo diodes exhibit dark currents in
the order of 10pA/cm2, i.e., at least one order of magnitude lower than the case in standard CMOS wafers. Furthermore, scientific CCD-based imagers built on highly resistive float-zone (FZ) silicon have been shown to exhibit sub-pA/cm2 dark current behaviors at room temperature. Hence it seems to be a reasonable assumption that high carrier-lifetime wafers processed in a clean environment to not to degrade their excellent dark current properties are a good starting point for ultra low-noise detection systems in the NIR spectral range. A very interesting side effect of minimizing the current for NIR applications is that such technology inherently will enable single-photon detection capability if junctions are operated in avalanche mode.
3.3 High Voltage Interface Capable CMOS Process Node
When combining various aspects of product requirements in terms of analog as well as digital capabilities, it boils down to the choice of a 130nm process node which is technically as well as commercially well balanced:
the 1.8V digital core voltage leads to competitive current consumptions for low complexity micro controller cores like the ARM7 architecture. The memory density in this node is the 1.0Mbit/mm2 range and the logic density of 200kgates/mm2 is compatible with moderate DSP accelerator functionality required for digital signal processing. Within the 130nm node, most radio frequency (RF) functions for the important 2.4GHz ISM band for wireless communication utilized in Bluetooth, Zigbee, GSM, etc. are readily available, hence allowing a simple integration of the radio interface electronics. Yet, the second gate oxide for such a process node is still compatible with 3.3V and 5V applications avoiding the complications of a triple gate-oxide process. By implementing drain-extended MOS (DEMOS) structures, IO voltages up to 40V can be realized, enabling the realization of a wide variety of industry standards.
3.4 Non-Volatile Memory
To complete the integration strategy for a high quantum efficiency NIR detector with a 130nm CMOS process node, a high-density non-volatile memory solution is required to safely store configuration and calibration information within the detector system and to allow an easy customization of the sensor application towards customer needs. The well-known Flash and EEPROM memory technologies fit well into a 130nm technology node.
4. PHOTONICS SYSTEM INTEGRATION
The traditional approach of mounting myriads of discrete electronic components on a single PCB or PCB stack has the inherent limitation of requiring packaging of each individual component and hence each time contributing to the total price of the system. Depending on the type of component, the packaging cost can make up more than 100% of the unpacked chip or component cost. Hence there is a tremendous potential of cost savings buried in the individually packaged devices. In order to keep competitiveness in the worldwide market of opto sensors, an immediate solution is to decrease assembly and packaging cost to the minimum. This can be achieved through various avenues: one of them is striving for package-scale or even chip-scale integration levels as shown in Figure 2. A first immediate action will be the implementation of package-scale photonics chips. They rely on BGA housings using conventional PCBs with solder balls. Standard pick-and-place machines in SMD assembly lines can handle them. Focal lengths of more than 10mm are possible. Such a package will contribute about 20%
to the chip price while still being reasonable in terms of production setup cost. Hence, it is well suited for low to high volume quantities.
Figure 2 shows such an optoelectronic chip assembled to a PCB by conventional SMD machines and lead-free soldering. The chip (encircled on the photo) has a size of 0.86 x 1.16mm and a thickness of 50mm. The light comes from the top whereas the active part of the electronic circuitry is on the bottom side of the chip. Also, the solder joints to the PCB are made by stud bumps in the bottom side of the chip. Thus, a fill factor of 100% is achieved which means that the whole chip area on the backside is photosensitive. This chip contains approx. 150,000 transistors and builds a complete sensor node of a light curtain.
If one targets higher volumes or smaller package sizes, it is inevitable to go for chip-scale packages. They are based on fine-line PCB technology and realistically allow for focal lengths of up to 4mm. In such a case, the package will only contribute approx. 5% to the chip price. In both cases, the top cap of the package can contain the optical lens system together with optical filters, polarizers, and other photonic components fabricated in plastic injection mold or reflow technology. It can be assumed that a full-fledged system-level OSIP will cut system cost in half: the component count can be reduced by more than a factor of 3 while at the same time achieving an area reduction of 4 and a volume reduction by a factor of 10. These systems can be delivered to customers fully tested and will open up many new sensor markets due to their extremely interesting price-performance ratio.
5. PRACTICAL EXAMPLES
5.1 Intelligent Photo-Diode Receivers
Single-beam and multi-beam light barriers as well as light curtains are a class of industrial opto-sensors that are produced in quantities beyond tens of millions of pieces per year. Whereas the light-barrier products suffer from the lack of highly integrated photo detectors mostly in view of a limited degree of miniaturization, there exists a distinct bottleneck in the economics of light curtains. In order to understand this problem, we need to have a closer look into how light curtains are built and operated today: Light curtains are built out of several identical pairs of transmitters (LEDs) and receivers (PIN photodiode plus electronics) located in two aluminum or plastic profiles as shown in Figure 3. In order to minimize the wiring within the profiled edges, the transmitter elements and receiver elements are located in XY-matrix arrangement and are addressed individually by a proper scanning of the matrix wiring. An internal or external controller takes care of the required timing of the light curtain. Each receiver element in the light curtain is only powered-up shortly before the expected arrival of the light pulse. In order to satisfy safety applications, the scanning operation of the light curtain needs to be extremely fast which immediately translates into a very rapid power-up behavior of the receiver nodes built from discrete SMD components. However, the price erosion that has been observed in the light curtain market over the last decade basically makes it impossible to continue the traditional route and ask for new architectures in this product segment.
Higher integration levels for the individual receiver elements addresses the dilemma form various angles of attack: a fully integrated optical front-end with high-performance signal conditioning, on-chip signal and information processing together with robust interfaces will reduce the component count and hence reduces component and assembly cost while at the same time increasing the technical performance and reliability. Figure 4 details the concept of the first step towards a fully integrated, intelligent NIR receiver/transmitter chip which will be the core of future light curtains as well as single-beam or fork light barriers.
As can be seen in Figure 4, the communication between the sensor elements is handled through a two-wire power-line interface tailored to the timing and safety needs of such opto sensors. Figure 5 exhibits the individual blocks within the intelligent NIR receiver/transmitter chips. In a following step, the external photo-diodes will be replaced by on-chip photodiodes in order to further increase optical sensitivity and reduce component count and cost. It is foreseeable that in the future, there will be packaged sensor nodes available that are directly crimped to the twisted pair power-supply lines.
5.2 3D-TOF Cameras
The classes of products that have been discussed in the previous subsection where either point based (single-beam light barriers) or operating on a plane (light curtains). However, the real world environments of today’s manufacturing sites as well as demand for safety and comfort in domotics and public areas ask for much more complex decision making processes out of 3D information. It is well known since the beginning of image processing that it is extremely difficult to “guess” a 3D environment from 2D color or grayscale images. Sooner later every algorithm devised to extract 3D information from 2D images fails due to the lack of a true measurement of target distance. However, many approaches exist today to directly measure 3D maps through various approaches. Among them the 3D time-of-flight (3D-TOF) approach that measures directly or indirectly the flight time of single photons is very popular. Unfortunately, devices capable of measuring photon flight times are either mechanically complex such as laser scanners [2] or they require enormous amounts of active illumination due to their lack of highly sensitive photon receivers in the NIR range [3, 4, 5]. Either case leads to rather bulky devices and high pricing which reduces their applicability in mass-market applications such as safety-devices for automotive, human-machine-interfaces for computers and gaming, doors and gates, machine safety, domotics and many others. Highly integrated 3D-TOF cameras with a reasonable image resolution, both, laterally and distance wise paired together with on-chip signal and information processing will open up application fields comparable to what web-cams have done in the past. As long as the tricky part of measuring the photon flight time is shielded from the user and only an external interface simple as a microcontroller is presented to them, they can fully concentrate on the application itself instead of tricky physical measurement tasks.
6. CONCLUSIONS
It has been shown in this paper that radically novel approaches are required to implement highly integrated photonic detection systems that are sensitive in the NIR spectral range. The basic building blocks have been around individually for quite some time but have never been integrated together mostly for economical reasoning of traditional semiconductor manufacturers of standard electronic devices. It further has been shown that the existing market for such integrated OSOCs and OSIPs is substantial enough to justify the implementation of a dedicated wafer fab in this domain. Over the period of the next several years, it is foreseeable that many high-volume products present but usually not remarked in the everyday life will be migrated from the traditional discrete assembly technologies of SMD components on a PCB into higher integration levels. This has been illustrated on the example of intelligent photo-diode receivers as well as low-cost 3D-TOF cameras.
REFERENCES
CEDES AG, http://www.cedes.com
ESPROS Photonics AG, http://www.espros.ch
Sick AG, http://www.sick.com
Mesa Imaging AG, http://www.mesa-imaging.ch
PMD Technologies, http://www.pmdtec.com
Canesta, http://www.canesta.com
Figure 2: Comparison of package-scale vs. chip-scale integration. 
Figure 3: Example of a light curtain for elevator-door application. 
Figure 4: Basic architecture of new-generation light curtain based on intelligent sensor nodes and two-wire bus. 
Figure 5: Block diagram of the intelligent opto-sensor node epc100 with integrated photodiode. The same integrated circuit is useable for light-curtain, single-beam and multi-beam, as well as fork light barriers by configuring it (refer also to Figure 2). 
Figure 6: 3D-TOF camera used for 3D elevator door protection.
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